LeonardoSpectrum offers customers a well-proven, mature synthesis solution for both FPGAs and ASICs.
Features
- Mature synthesis tool for designing PLDs, FPGAs and ASICs, in VHDL or Verilog
- Supports many current and legacy FPGA devices and ASIC families
- Highly controllable advanced synthesis algorithms
- Language neutrality, and both platform and target device independence
Benefits
- One tool, one easy learning curve, one set of scripts -- for CPLDs, FPGAs, or ASICs
- Provides high quality of results with the speed and features needed for large designs
- True hierarchical support allows for easy grouping of design elements, enabling a single design to be partitioned across multiple devices
- LeonardoInsight schematic viewer accelerates synthesis analysis